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Protection of Layout-Designs (Topographies) of Integrated Circuits Act, 2007 (Act No. 19 of 2007) (Chapter 18.40), Saint Kitts and Nevis
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Latest Version in WIPO Lex
Year of Version
2009
Dates
Entry into force:
November 5, 2007
Type of Text
Main IP Laws
Subject Matter
Layout Designs of Integrated Circuits
Notes
This is a revised edition of the Protection of Layout-Designs (Topographies) of Integrated Circuits Act (Chapter 18.40, also known as Act No. 19 of 2007) was prepared on December 31, 2009, by the Law Commission under the authority of the Law Commission Act, 2012 (Cap. 1.03).
There have been no amendments introduced to this revised edition of the Protection of Layout-Designs (Topographies) of Integrated Circuits Act since the date of entry into force of the Act.
Available Texts
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Main text(s)
English
Protection of Layout-Designs (Topographies) of Integrated Circuits Act, 2007 (Act No. 19 of 2007) (Chapter 18.40)
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WTO Document Reference
IP/N/1/KNA/4
IP/N/1/KNA/L/1
WIPO Lex No.
KN006