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Act on the Circuit Layout of a Semiconductor Integrated Circuits (Act No. 43 of May 31, 1985, as amended up to Act No. 72 of July 13, 2018), Japan
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This text has been amended and a consolidated version is not yet available in WIPO Lex.
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Year of Version
2018
Dates
Including amendment(s) up to:
July 13, 2018
Promulgated:
May 31, 1985
Type of Text
Main IP Laws
Subject Matter
Layout Designs of Integrated Circuits
Subject Matter (secondary)
Enforcement of IP and Related Laws,
IP Regulatory Body
Notes
This consolidatd version of the Act on the Circuit Layout of a Semiconductor Integrated Circuits (Act No. 43 of May 31, 1985) takes into account amendments up to the Act No. 72 of July 13, 2018 (Act on the Partial Revision of the Civil Code and the Domestic Relations Case Procedure Law), which entered into force on July 1, 2019; except for certain provisions that entered into force on different dates (July 13, 2019; April 1, 2020).
Available Texts
Main text(s)
Main text(s)
Japanese
半導体集積回路の回路配置に関する法律(昭和60年5月31日法律第43号。最終改正平成2018年7月13日法律第72号)
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Legislation
Supersedes (2 text(s))
Supersedes (2 text(s))
Is amended by (1 text(s))
Is amended by (1 text(s))
Is implemented by (1 text(s))
Is implemented by (1 text(s))
WIPO Lex No.
JP245