World Intellectual Property Organization

Belize

Protection of Layout-Designs (Topographies) of Integrated Circuits Regulations

Year of Version:2003
Date of Entry into Force:August 25, 2001
Date of Text (Issued):August 17, 2001
Type of Text:Implementing Rules/Regulations
Subject Matter:Industrial Property, Layout Designs of Integrated Circuits
Available Texts: 
English

Protection of Layout-Designs (Topographies) of Integrated Circuits Regulations Protection of Layout-Designs (Topographies) of Integrated Circuits Regulations, Complete document (pdf) [112 KB] Protection of Layout-Designs (Topographies) of Integrated Circuits Regulations, Complete document (htm) [101 KB] (Version with Automatic Translation Tool)

Related Legislation:
WIPO Lex No.:BZ017

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