(WO/2007/005724) FPGA CIRCUITS AND METHODS CONSIDERING PROCESS VARIATIONS
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| Latest bibliographic data on file with the International Bureau
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| IPC: | G06F 17/10 (2006.01) | |||||||||||
| Applicants: | THE REGENTS OF THE UNIVERSITY OF CALIFORNIA [US/US]; 1111 Franklin Street, 12th Floor, Oakland, CA 94607 (US) (All Except US). HE, Lei [--/US]; (US) (US Only). | |||||||||||
| Inventor: | HE, Lei; (US). | |||||||||||
| Agent: | O'BANION, John, P.; O'Banion & Ritchey LLP, 400 Capitol Mall, Suite 1550, Sacramento, CA 95814 (US). | |||||||||||
| Priority Data: |
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| Title: | FPGA CIRCUITS AND METHODS CONSIDERING PROCESS VARIATIONS | |||||||||||
| Abstract: | Methods are described herein which consider both die-to-die and within-die variations in effective channel length, threshold voltage, and gate oxide thickness, based on first developing closed-form models of chip level FPGA leakage and timing variations. Execution times are significantly reduced using these methods in comparison to performing detailed evaluation. The teachings provide mean and standard deviation which were found to be within 3% from those computed by Monte Carlo simulation, while leakage and delay variations can be up to 3X and 1.9X, respectively. Analytical yield models are derived which consider both leakage and timing variations, and use such models to evaluate FPGA device and architecture in response to process variations. The teachings allow improved modeling of leakage and timing yields and thus co-optimization to improve yield rates. | |||||||||||
| Designated States: |
AE, AG, AL, AM, AT, AU, AZ, BA, BB, BG, BR, BW, BY, BZ, CA, CH, CN, CO, CR, CU, CZ, DE, DK, DM, DZ, EC, EE, EG, ES, FI, GB, GD, GE, GH, GM, HN, HR, HU, ID, IL, IN, IS, JP, KE, KG, KM, KN, KP, KR, KZ, LA, LC, LK, LR, LS, LT, LU, LV, LY, MA, MD, MG, MK, MN, MW, MX, MZ, NA, NG, NI, NO, NZ, OM, PG, PH, PL, PT, RO, RS, RU, SC, SD, SE, SG, SK, SL, SM, SY, TJ, TM, TN, TR, TT, TZ, UA, UG, US, UZ, VC, VN, ZA, ZM, ZW. African Regional Intellectual Property Org. (ARIPO) (BW, GH, GM, KE, LS, MW, MZ, NA, SD, SL, SZ, TZ, UG, ZM, ZW) Eurasian Patent Organization (EAPO) (AM, AZ, BY, KG, KZ, MD, RU, TJ, TM) European Patent Office (EPO) (AT, BE, BG, CH, CY, CZ, DE, DK, EE, ES, FI, FR, GB, GR, HU, IE, IS, IT, LT, LU, LV, MC, NL, PL, PT, RO, SE, SI, SK, TR) African Intellectual Property Organization (OAPI) (BF, BJ, CF, CG, CI, CM, GA, GN, GQ, GW, ML, MR, NE, SN, TD, TG). | |||||||||||
| Publication Language: | English (EN) |
| Filing Language: | English (EN) |
