(0)G06F:3/5:

(0)G06F:3/5:

IPC6

SECTION G - PHYSICS

ELECTRIC DIGITAL DATA PROCESSING

G06F

4/6

G06F012/00 - G06F013/42

12

/

00

Accessing, addressing or allocating within memory systems or architectures (information storage in general G 11) [4,5]

Addressing or allocation; Relocation (programme address sequencing G 06 F 9/00; arrangements for selecting an address in a digital store G 11 C 8/00) [4]

Addressing variable-length words or parts of words [4]

Addressing a physical block of locations, e.g. base addressing, module addressing, address space extension, memory dedication (G 06 F 12/08 takes precedence) [4]

in hierarchically structured memory systems, e.g. virtual memory systems [4]

Address translation [4]

Replacement control [4]

Protection against unauthorised use of memory [4]

Protection against loss of memory contents [4]

Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units (interface circuits for specific input/output devices G 06 F 3/00 ; multi-processor systems G 06 F 15/16; transmission of digital information in general H 04 L; selecting H 04 Q) [4]

Programme control for peripheral devices (G 06 F 13/14 to G 06 F 13/42 take precedence) [4]

using hardware independent of the central processor, e.g. channel or peripheral processor [4]

Handling requests for interconnection or transfer [4]

for access to memory bus (G 06 F 13/28 takes precedence) [4]

with priority control [4]

for access to input/output bus [4]

using successive scanning, e.g. polling (G 06 F 13/24 takes precedence) [4]

using interrupt (G 06 F 13/32 takes precedence) [4]

with priority control [4]

using burst mode transfer, e.g. direct memory access, cycle steal (G 06 F 13/32 takes precedence) [4]

with priority control [4]

using combination of interrupt and burst mode transfer [4]

with priority control [4]

for access to common bus or bus system [4]

with centralised access control [5]

using independent requests or grants, e.g. using separated request and grant lines [5]

using a centralised polling arbiter [5]

with decentralised access control [5]

using a physical-position-dependent priority, e.g. daisy chain, round robin or token passing [5]

using a time-dependent priority, e.g. individually loaded time counters or time slot [5]

using a self-select method with individual priority code comparator [5]

using a contention resolving method, e.g. collision detection, collision avoidance [5]

using a parallel poll method [5]

Information transfer, e.g. on bus (G 06 F 13/14 takes precedence) [4]

Bus structure [4]

Bus transfer protocol, e.g. handshake; Synchronisation (synchronisation in transmission of digital information in general H 04 L 7/00) [4]

4